HP2-T11 questions and answers

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Exam Code: HP2-T11
Exam Name: HP (Industry Standard)
One year free update, No help, Full refund!
Total Q&A: 142 Questions and Answers
Last Update: 2013-12-27

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NO.1 What is the maximum number of nodes supported in a Fibre Channel Switched Fabric (FC-SW)
environment?
A. 125
B. 126
C. 15 million
D. 16 million
Answer: D

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NO.2 Which statements apply to AMD 2P or 4P system architecture? (Select three )
A. Each processor can access only its own memory
B. Requests for memory access are handled by the Northbndge ASIC
C. Each processor can access the full complement of installed memory
D. Memory must be installed in banks corresponding to the installed processors
E. The maximum amount of memory can be installed, regardless of the number of installed processors
F. Requests for memory access are handled directly by the corresponding processor and relayed through
the HyperTransport lnk
Answer: ADF

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NO.3 A customer has an existing mission critical database application using approximately 20TB of network
storage and plans to add a web server component to the existing environment to increase the storage by
50% Which tape storage technology would you recommend?
A. Autoloader
B. Travan Tape System
C. business-class library
D. enterprise-class library
Answer: C

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NO.4 What is a characteristic of a PCI-X-based bus?
A. You cannot use PCI-X cards in a conventional PCI system
B. It is fully backward compatible with conventional PCI devices
C. You cannot use existing PCI devices in a PCI-X-based system
D. It is compatible with conventional PCI devices only after updating to newer drivers
Answer: B

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NO.5 Which RAID implementation allows for simultaneous failure of multiple drives?
A. RAIDO
B. RAID 4
C. RAID 5
D. RAID 6
Answer: D

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NO.6 How does the operation of RAID memory differ from RAID 5 disk storage? (Select three)
A. Data is written sequentially to all banks of memory
B. Data is written simultaneously to all banks of memory
C. Existing parity information must be read before calculating the new parity value
D. There is no need to read the existing parity before calculating a new parity value
E. The memory controller writes parity information to a dedicated parity bank of DIMMs
Answer: BDE

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NO.7 What best describes PCI-X architecture?
A. 32-bit bus that runs at speeds of up to 66MHz
B. 64-bit bus that runs at speeds of up to 66MHz
C. 64-bit bus that runs at speeds of up to 133MHz
D. 32-bit bus that runs at speeds of up to 133MHz
Answer: C

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NO.8 Which backup type would you recommend if a customer environment requires saving the latest
version of each file?
A. full
B. copy
C. differential
D. incremental
Answer: D

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NO.9 In systems with AMD processors, what allows communication between processors and the I/O
subsystem?
A. APIC
B. Northbridge
C. Southbridge
D. HyperTransport lnk
Answer: D

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NO.10 Which system architecture is displayed?
A. Dual Peer I/O Bus (DPIO)
B. Triple Peer I/O Bus (TPIO)
C. Highly Parallel System Architecture (HPSA)
D. Memory and I/O Controller Architecture (MIOC)
Answer: C

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NO.11 What happens if you install a 66MHz, 32-bit PCI card in a 33MHz, 64-bit PCI slot? (Select two)
A. The 66MHz card operates at 33MHz
B. The 66MHz, 32-bit card operates at 33MHz in 32-bit mode
C. The 66MHz, 32-bit card operates at 33MHz in 64-bit mode
D. Any 33MHz, 64-bit cards on the PCI bus operate like 33MHz, 32-bit cards
Answer: AB

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NO.12 The system administrator typically performs a full backup every Monday and incremental backups on
Tuesdays, Wednesdays, and Thursdays In addition, full backups are performed at the end of the week
and at the end of the month
Which GFSterm refers to the monthly full backup?
A. son
B. sister
C. father
D. grandfather
Answer: D

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NO.13 Which statement best describes PCI Express architecture?
A. Data is sent in parallel
B. Data is sent serially over each link
C. PCI Express has more pins than PCI-X
D. PCI Express transfers data in half-duplex
Answer: B

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NO.14 Which statement is correct when comparing similar versions of Intel Xeon and AMD Opteron
processors'?
A. Xeon processors are optimized for parallel execution
B. Opteron processors are optimized for parallel execution
C. Opteron processors use a Northbridge that operates at core bus speed
D. Xeon processors use an integrated memory controller that operates at core processor speed
Answer: B

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NO.15 Serial Attached SCSI (SAS) technology uses the same electrical and physical interface as which
technology?
A. IDE
B. ATA
C. iSCSI
D. SATA
Answer: D

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NO.16 What is an advantage of using iSCSI?
A. it enables the use of SCSI cables for Ethernet communications
B. it enables the use of SAS and SATA drives using standard SCSI controllers
C. It overcomes the inability to use shared storage devices in a heterogeneous environment
D. It overcomes the distance limitations associated with standard Fibre Channel storage transport
Answer: A

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NO.17 A customer asks you for information about the advantages of RAID 6 over other RAID levels What can
you recommend? (Select three)
A. Performance is equivalent to RAID 5 when reading data.
B. It is the most cost-effective of the fault-tolerant RAID solutions.
C. lt has greater faulttolerancethan RAID4, RAID 1+0, or RAID5.
D. It uses the most storage capacity for fault tolerance of all the RAID levels.
E. it is ideal for applications requiring large logical drives with many physical drives.
Answer: ACE

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NO.18 What is the difference between single-ended SCSI and differential SCSI?
A. Single-ended uses twisted pair wires
B. Differential is more susceptible to noise
C. Differential uses a single signal wire and has length limitations
D. Single-ended uses a single signal wire and has length limitations
Answer: D

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NO.19 In systems with AMD processors, what allows communication between processors and the I/O
subsystem?
A. APIC
B. Northbridge
C. Southbridge
D. HyperTransport lnk
Answer: D

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NO.20 What is a characteristic of Double Data Rate (DDR) RAM?
A. sends data every other clock cycle
B. sends data on the rising edge of the clock cycle only
C. sends data on the falling edge of the clock cycle only
D. sends data on both the rising and falling edge of each clock cycle
Answer: D

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